Dong Tong ( 佟 冬 )
I am an associate professor at School of Electronic Engineering and Computer Science, Peking University. I currently work with the Institute of Computer Architecture, also named MPRC (Microprocessor R&D Center, Peking University)
Contact Information
Institute of Computer Architecture
School of EECS, Peking University
Room 1801, Science Building 1, Peking University
#5 Yiheyuan Road, Haidian District, Beijing, China, 100871
Office phone: 8610-62765828-802
Email: tongdong@mprc.pku.edu.cn
Research Interests
l Processor Microarchitecture
l Many-core On-chip Memory Hierarchy Architecture
l Many-core Off-chip Memory Controller
l Network on Chip
l FPGA Accelerator
Teaching
l Digital Logic Design from 2001 to now
l Multicore Memory Hierarchies from 2015 to now
Selected Publications (Note: All copyrights of the following digital copies belong to the corresponding publishers and the authors) 
Conference:
1. Yangguo Liu, Junlin Lu, Dong Tong, Xu Cheng. A Staged Memory Resource Management Method for CMP systems. 2017 IEEE 28th International Conference on Application-specific Systems, Architectures and Processors (ASAP), 2017. [pdf]
2. Yangguo Liu, Junlin Lu, Dong Tong, Xu Cheng, Locality-Aware Bank Partitioning for Shared DRAM MPSoCs, in the 22nd Asia and South Pacific Design Automation Conference (ASP-DAC), 2017. [pdf]
3. Yan Sui, Chun Yang, Dong Tong and Xu Cheng. MFAP:Fair Allocation Between Fully Backlogged and Non-Fully Backlogged Applications, in 2016 International Conference on Computer Design (ICCD), 2016. [pdf]
4. Mingli Xie, Dong Tong, Kan Huang, Xu Cheng, Improving System Throughput and Fairness Simultaneously in CMP Systems via Dynamic Bank Partitioning, in the 20th IEEE International Symposium on High Performance Computer Architecture (HPCA), 2014. [pdf]
5. Zichao Xie, Dong Tong, Xu Cheng, An energy-efficient branch prediction technique via global-history noise reduction, in International Symposium on Low Power Electronics and Design (ISLPED), 2013. [pdf]
6. Mingli Xie, Dong Tong, Yi Feng, Kan Huang, Xu Cheng, Page Policy Control with Memory Partitioning for DRAM Performance and Power Efficiency, in International Symposium on Low Power Electronics and Design (ISLPED), 2013. [pdf]
7. Ning Jia, Chun Yang, Jing Wang, Dong Tong, Keyi Wang. SPIRE: Improving Dynamic Binary Translation through SPC-indexed Indirect Branch Redirecting, in the Ninth Annual International Conference on Virtual Execution Environments (VEE), 2013. [pdf]
8. Xianglei Dang, Xiaoyin Wang, Dong Tong, Zichao Xie, Lingda Li, Keyi Wang, An Adaptive Filtering Mechanism for Energy Efficient Data Prefetching, in the 18th Asia and South Pacific Design Automation Conference (ASP-DAC), 2013. [pdf]
9. Qiaoli Xiong, Jiangfang Yi, Tianbao Song, Zichao Xie, Dong Tong, VFCC: A Verification Framework of Cache Coherence using Parallel Simulation, in the 18th Asia and South Pacific Design Automation Conference (ASP-DAC), 2013. [pdf]
10. Zhenhao Zhang, Dong Tong, Xiaoyin Wang, Jiangfang Yi, Keyi Wang, SOLE: Speculative One-cycle Load Execution with scalability, high-performance and energy-efficiency, in the IEEE International Conference on Computer Design (ICCD), 2012. [pdf]
11. Lingda Li, Dong Tong, Zichao Xie, Junlin Lu, Xu Cheng, Improving Inclusive Cache Performance with Two-level Eviction Priority, in the IEEE International Conference on Computer Design (ICCD), 2012. [pdf]
12. Lingda Li, Dong Tong, Zichao Xie, Junlin Lu, Xu Cheng, Optimal Bypass Monitor for High Performance Last-level Caches, in the International Conference on Parallel Architectures and Compilation Techniques (PACT), 2012. [pdf]
13. Mingxing Tan, Xianhua Liu, Dong Tong, Xu Cheng, CVP: An Energy-Efficient Indirect Branch Prediction with Compiler-Guided Value Pattern, in the International conference on Supercomputing (ICS), 2012. [pdf]
14. Xianglei Dang, Xiaoyin Wang, Dong Tong, Junlin Lu, Jiangfang Yi, Keyi Wang, S/DC: A Storage and Energy Efficient Data Prefetcher, in the Design Automation and Test in Europe (DATE), 2012. [pdf]
15. Mingxing Tan, Xianhua Liu, Zichao Xie, Dong Tong, Xu Cheng, Energy-Efficient Branch Prediction Using Compiler-Guided History Stack, in the Design Automation and Test in Europe (DATE), 2012. [pdf]
16. Liucheng Guo, Jiangfang Yi, Liang Zhang, Xiaoyin Wang, Dong Tong, CGA: Combining Cluster Analysis with Genetic Algorithm for Regression Suite Reduction of Microprocessors, in the IEEE International SoC Conference (SOCC), 2011. [pdf]
17. Zichao Xie, Dong Tong, Mingkai Huang, Xu Cheng, TAP Prediction: Reusing Conditional Branch Predictor for Indirect Branches with Target Address Pointers, in the IEEE International Conference on Computer Design (ICCD), 2011. [pdf]
18. Hao Li, Dong Tong, Kan Huang, Xu Cheng. FEMU: A Firmware-Based Emulation Framework for SoC Verification, in the International Conference on Harware/Software Codesign and System Synthesis (CODES+ISSS), 2010. [pdf]
19. Dan Liu, Yi Feng, Jingjin Zhou, Dong Tong, Xu Cheng, Keyi Wang. TERA: A FPGA-Based Trace-Driven Emulation Framework for Designing On-Chip Communication Architectures, in the IEEE International SoC Conference (SOCC), 2010. [pdf]
20. Shu Liu, Xu Cheng, Xuetao Guan, Dong Tong, Energy Efficient Management Scheme for Heterogeneous Secondary Storage System in Mobile Computer, in the 25th ACM Symposium on Applied Computing (SAC), 2010. [pdf]
21. Kan Huang, Junlin Lu, Jiufeng Pang, Yansong Zheng, Hao Li, Dong Tong, Xu Cheng. FPGA Prototyping of an AMBA-Based Windows-Compatible SoC, in the 18th ACM SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA), 2010. [pdf]
22. Zichao Xie, Dong Tong, Xu Cheng, WHOLE: A Low Energy I-Cache with Separate Way History, in IEEE International Conference on Computer Design (ICCD), 2009. [pdf]
23. Yulai Zhao, Xianfeng Li, Dong Tong, Xu Cheng, Reuse Distance Based Cache Leakage Control, in 14th IEEE International Conference on High Performance Computing (HiPC), 2007. [pdf]
24. Hanxin Sun, Zheng Shang, Xiaoxin Wang, Xianfeng Li, Dong Tong, Xu Cheng, LAFI: Look-Ahead Mechanism for Energy-Efficient Branch Prediction, in IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2007. [pdf]
25. Yi Feng, Zheng Zhou, Dong Tong, Xu Cheng, Clock Domain Crossing Fault Model and Coverage Metric for Validation of SoC Design, in Design Automation and Test in Europe (DATE), 2007.[pdf]
26. Xiaoying Zhao, Jiangfang Yi, Dong Tong, Xu Cheng, Leakage power reduction for CMOS combinational circuits, in 2006 8th International Conference on Solid-State and Integrated Circuit Technology, 2006.
27. Xiaoying Zhao, Kui Wang, Xu Cheng, Dong Tong, A leakage power estimation method for standard cell based design, in 2005 IEEE Conference on Electron Devices and Solid-State Circuits, 2005.
28. Qiang Liu, Fangzhen Ma, Dong Tong, Xu Cheng, Efficient implementation of the RSA crypto processor in deep sub-micron technology, in Proceedings of the ICISA 2nd International Conference on Applied Cryptography and Network Security (ACNS), 2004.
29. Qiang Liu, Fangzhen Ma, Dong Tong, Xu Cheng, A regular parallel RSA processor, in the 2004 47th Midwest Symposium on Circuits and Systems (MWSCAS), 2004.
30. Qiang Liu, Dong Tong, Xu Cheng, A new systolic architecture without global broadcast, in Proceedings. ICSP'04. 2004 7th International Conference on Signal Processing, 2004.
Journal:
1. Zichao Xie, Dong Tong, Mingkai Huang. A General Low-Cost Indirect Branch Prediction Using Target Address Pointers[J]. Journal of Computer Science and Technology, 2014, 29(6): 929-946.
2. Tan Mingxing, Liu Xianhua, Zhang Jiyu, Tong Dong, Xu Cheng. Compiler-Directed Value Correlation for Indirect Branch Prediction, in Chinese Journal of Electronics (CJE), Vol. 21, No.3, June 2012. [pdf]
3. Zhenhao Zhang, Xiaoyin Wang, Dong Tong, Jiangfang Yi, Junlin Lu, Keyi Wang. Active Store Window: Enabling Far Store-Load Forwarding with Scalability and Complexity-Efficiency, in Journal of Computer Science and Technology (JCST), Vol.27, No.4, July 2012. [pdf]
4. Zichao Xie, Dong Tong, Mingkai Huang, Qinqing Shi, Xu Cheng, SWIP Prediction: Complexity-Effective Indirect-Branch Prediction Using Pointers, in Journal of Computer Science and Technology (JCST), Vol.27, No.4, July 2012.[pdf]
5. Yansong Zheng, Junlin Lu, Dong Tong, Keyi Wang, Xu Cheng. Detect Peripheral Hardware Faults using IO-state-based Dynamic Value Invariants, in Chinese Journal of Electronics (CJE), Vol.21. No.2, February 2012. [pdf]
6. Liu Shu, Guan Xuetao, Tong Dong, Cheng Xu, Analysis and Comparison of NAND Flash Specific File Systems, in Chinese Journal of Electronics (CJE), Vol.19, No.3, July 2010. [pdf]
7. Xu Cheng, Xiaoyin Wang, Junlin Lu, Jiangfang Yi, Dong Tong, Xuetao Guan, Feng Liu, Xianhua Liu, Chun Yang, Yi Feng, Research Progress of UniCore CPUs and PKUnity SoCs, in Journal of Computer Science and Technology (JCST), Vol.25, No.2, March 2010. [pdf]
8. Chen Jie, Tong Dong, Li Xianfeng, Xie Jingsong, Wang Keyi and Cheng Xu, Slice Analysis Based Bayesian Power Model for Sequential Circuits, in Chinese Journal of Electronics (CJE), Vol.19, No.1, January 2010. [pdf]
9. Xie Jinsong, Li Xianfeng, Tong Dong, Chen Jie, Xu Cheng, A Low-Power dTLB Design Based on Memory Region Encoding, in The Chinese Journal of Electronics (CJE), Vol.17, No,4, October 2008. [pdf]
10. Hanxin Sun, Kunpeng Yang, Yulai Zhao, Tong Dong, Xu Cheng, CASA: A New IFU Architecture for Power-Efficient Instruction Cache and TLB Designs, in Journal of Computer Science and Technology (JCST), vol. 23, No.1, March 2008. [pdf]
11. Yulai Zhao, Xianfeng Li, Tong Dong, Xu Cheng, An Energy-Efficient Instruction Scheduler Design with Two-Level Shelving and Adaptive Banking, in Journal of Computer Science and Technology (JCST), vol. 22, No.1, March 2007. [pdf]
Education
B.E'93, Ms.E'96, PhD'99, Harbin Institute of Technology, China
